1. Field of the Invention
This invention relates to an active matrix type display apparatus from among display apparatus wherein pixel circuits are arrayed in a matrix, such as an organic electroluminescence (EL) display apparatus, and a driving method for the active matrix type display apparatus.
2. Description of the Related Art
In an image display apparatus such as, for example, a liquid crystal display (LCD) apparatus (hereinafter referred to as LCD apparatus), a large number of pixels are arrayed in a matrix and the intensity of light is controlled for each pixel in response to image information to be displayed to display an image.
Meanwhile, an organic EL display apparatus is a display apparatus of the self luminous display apparatus wherein each pixel circuit includes a light emitting device. The organic EL display apparatus is advantageous when compared with the LCD apparatus in that it is high in visual observability of a display image, no backlight is required and the response speed is high.
Further, the luminance of each light emitting device is controlled with the value of current flowing through the light emitting device to obtain a gradation of color development. In other words, the organic EL display apparatus is much different in characteristic from the LCD apparatus in that the light emitting device is of the current controlled type.
A simple matrix type driving system and an active matrix type driving system are available as a driving system for an organic EL display similarly to an LCD apparatus. Although the former system is simple in structure, it is not suitable to implement a display apparatus of a large size and a high definition. Therefore, development of the latter active matrix type driving system wherein an active device provided in the inside of each pixel circuit, usually a thin film transistor (TFT), is used for control is proceeding energetically.
Here, a principle of operation of a typical active matrix type organic EL display apparatus is described.
FIG. 1 shows a configuration of a typical organic EL display apparatus.
Referring to FIG. 1, the display apparatus 10 shown includes a pixel array section 12 wherein pixel circuits (PXLC) 12a are arrayed in a m×n matrix, a horizontal selector (HSEL) 13, a vertical scanner (VSCN) 14, data lines DTL1 to DTLn selected by the horizontal selector 13 that is supplied with a data signal according to luminance information, and scanning lines WSL1 to WSLm selectively driven by the vertical scanner 14.
It is to be noted that the horizontal selector 13 and/or the vertical scanner 14 may be formed on polycrystalline silicon or formed from a MOSIC or the like and formed around the pixels.
An example of a configuration of the pixel circuits 12a shown in FIG. 1 is shown in FIG. 2.
Referring to FIG. 2, a pixel circuit 20 has the simplest circuit configuration among various circuit configurations proposed heretofore.
The pixel circuit 20 includes a p-channel TFT 21, an n-channel TFT 22, a capacitor C21, and a light emitting device 23 formed from an organic EL device (OLED).
The TFT 21 of the pixel circuit 20 is connected at the base thereof to a power supply potential VDD and at the gate thereof to the drain of the TFT 22. The light emitting device 23 is connected at the anode thereof to the drain of the TFT 21 and at the cathode thereof to a reference potential GND, which may be, for example, the ground potential.
The TFT 22 of the pixel circuit 20 is connected at the source thereof to a data line DTL (DTL1 to DTLn) of a corresponding column and at the gate thereof to a scanning line WSL (WSL1 to WSLm) of a corresponding row. The capacitor C21 is connected at one terminal thereof to the power supply potential VDD and at the other terminal thereof to the drain of the TFT 22.
It is to be noted that, since an organic EL device in most cases has a rectification property, it is sometimes called an OLED (Organic Light Emitting Diode) and is represented using a symbol of a diode as a light emitting device in FIG. 2 and so forth. However, in the following description, the rectification property is not necessarily required for the OLED.
Where the pixel circuit 20 having such a configuration as described above is used, and when luminance data are to be written into such pixels, a pixel row including the pixels is selected through a corresponding scanning line WSL by the vertical scanner 14, and the TFT 22 in the pixels of the row is turned on.
At this time, the luminance data is supplied in the form of a voltage from the horizontal selector 13 through the data line DTL and written into the capacitor C21 for retaining a data voltage through the TFT 22.
The luminance data written in the capacitor C21 is retained for a period of one field. The retained data voltage is applied to the gate of the TFT 21.
Consequently, the TFT 21 drives the light emitting device 23 with electric current in accordance with the retained data. At this time, a gradation representation of the light emitting device 23 is carried out by modulating gate-source voltage Vdata (<0) of the TFT 21 retained by the capacitor C21.
It is to be noted that, since the TFT transistors used in the configuration example of FIG. 2 behave as switch devices, in the following description, the switch devices can be formed from a n-channel TFT, a p-channel TFT or any other switch device.
Generally, the luminance Loled of an organic EL device increases in proportion to the current Ioled flowing through the organic EL device. Accordingly, the luminance Loled and the current Ioled of the light emitting device 23 satisfy the following expression (1):Loled∝Ioled=k(Vdata−Vth)  (1)where k=½·μ·Cox·W/L. Here, μ is the mobility of the carriers in the TFT 21, Cox the gate capacitance of the TFT 21 per unit area, W the gate width of the TFT 21, and L the gate length of the TFT 21.
Accordingly, the dispersion of the mobility μ and the threshold voltage Vth (<0) of the TFT 21 have a direct influence on the dispersion of the luminance of the light emitting devices 23.
In this instance, for example, even if the same potential Vdata is written into different pixels, the threshold voltage Vth of the TFT 21 disperses among the different pixels. Consequently, the current Ioled flowing through the light emitting device 23 disperses by a great amount among different pixels, and is displaced by a great amount from a desired value. As a result, a high picture quality cannot be expected with the display apparatus.
A large number of pixel circuits which solve the problem just described have been proposed, and a representative one of such pixel circuits is shown in FIG. 3.
Referring to FIG. 3, the pixel circuit 30 shown includes a p-channel TFT 31, n-channel TFTs 32 to 34, capacitors C31 and C32, and a light emitting device (OLED) 35 formed from an organic EL device. In FIG. 3, also, a data line DTL, a scanning line WSL, an auto zero line AZL and a driving line DSL are shown.
The operation of the pixel circuit 30 is described below with reference to FIGS. 4A to 4E.
The signal on the driving line DSL and the auto zero line AZL are set to the high level, as seen in FIGS. 4A and 4B, to place the TFT 32 and the TFT 33 into a conducting state, respectively. At this time, current flows through the TFT 31 because the TFT 31 is connected in a diode-connection state to the light emitting device 35.
Then, the signal on the driving line DSL is set to the low level to place the TFT 32 into a non-conducting state as seen in FIG. 4A. At this time, the scanning line WSL is placed into the high level state, as seen in FIG. 4C, to place the TFT 34 into a conducting state. Consequently, a reference potential Vref is applied to the data line DTL, as seen in FIG. 4D. Since the current flowing to the TFT 31 is interrupted thereby, the gate potential Vg of the TFT 31 rises, as seen in FIG. 4E. However, at a point in time at which the gate potential Vg rises to a potential of VDD−|Vth|, the TFT 31 enters a non-conducting state and the potential is stabilized. This operation is hereinafter referred to sometimes as an “auto zero operation”.
Then, the auto zero line AZL is set to the low level to place the TFT 33 into a non-conducting state and the potential at the data line DTL is set to a potential lower than the reference potential Vref by a voltage AVdata. The variation of the signal line potential lowers the gate potential of the TFT 31 by a voltage AVg through a capacitor C31, as seen from FIG. 4E.
Then, if the scanning line WSL is set to the low level to place the TFT 34 into a non-conducting state and the driving line DSL is set to the high level to place the TFT 32 into a conducting state, as seen in FIGS. 4A and 4C, respectively, then current flows through the TFT 31 and the light emitting device 35. Consequently, the light emitting device 35 begins to emit light.
If the parasitic capacitance can be ignored, then the voltage ΔVg and the gate potential Vg of the TFT 31 are determined in accordance with the following expression (2) and (3), respectively:ΔVg=ΔVdata×C1/(C1+C2)  (2)Vg=VCC−|Vth|−ΔVdata×C1/(C1+C2)  (3)where C1 is the capacitance value of the capacitor C31, and C2 the capacitance value of a capacitor C32.
On the other hand, where the current flowing through the light emitting device 35 upon light emission is represented by Ioled, the current Ioled is controlled by the TFT 31 connected in series to the light emitting device 35. If it is assumed that the TFT 31 operates in a saturation region, then a relationship given by the following expression (4) can be obtained using a well-known expression of the MOS transistor and the expression (3) above:
                                                        Ioled              =                              μ                ⁢                                                                  ⁢                                                      CoxW                    /                    L                                    /                  2                                ⁢                                                                  ⁢                                  (                                      VCC                    -                    Vg                    -                                                                Vth                                                                              )                                ⁢                                                                  ⁢                2                                                                                        =                              μ                ⁢                                                                  ⁢                                                      CoxW                    /                    L                                    /                  2                                ⁢                                                                  ⁢                                  (                                      Δ                    ⁢                                                                                  ⁢                    Vdata                    ×                    C                    ⁢                                                                                  ⁢                                          1                      /                                              (                                                                              C                            ⁢                                                                                                                  ⁢                            1                                                    +                                                      C                            ⁢                                                                                                                  ⁢                            2                                                                          )                                                                              )                                ⁢                                                                  ⁢                2                                                                        (        4        )            where μ is the mobility of the carrier, Cox the gate capacitance per unit area, W the gate width, and L the gate length.
According to the expression (4), the current Ioled is controlled with the potential ΔVdata provided from the outside independently of the threshold voltage Vth of the TFT 31. In other words, if the pixel circuit 30 of FIG. 3 is used, then a display apparatus which is comparatively high in uniformity of the current, and hence in uniformity of the luminance without being influenced by the threshold voltage Vth which disperses among different pixels can be implement.
The pixel circuit described above is disclosed, for example, in U.S. Pat. No. 5,684,365, Japanese Patent Laid-Open No. Hei 8-234683 or JP-2002-514320T.